stm32f4xx_it.c 6.7 KB

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  1. /* USER CODE BEGIN Header */
  2. /**
  3. ******************************************************************************
  4. * @file stm32f4xx_it.c
  5. * @brief Interrupt Service Routines.
  6. ******************************************************************************
  7. *
  8. * COPYRIGHT(c) 2018 STMicroelectronics
  9. *
  10. * Redistribution and use in source and binary forms, with or without modification,
  11. * are permitted provided that the following conditions are met:
  12. * 1. Redistributions of source code must retain the above copyright notice,
  13. * this list of conditions and the following disclaimer.
  14. * 2. Redistributions in binary form must reproduce the above copyright notice,
  15. * this list of conditions and the following disclaimer in the documentation
  16. * and/or other materials provided with the distribution.
  17. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  18. * may be used to endorse or promote products derived from this software
  19. * without specific prior written permission.
  20. *
  21. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  24. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  25. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  26. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  27. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  28. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. ******************************************************************************
  33. */
  34. /* USER CODE END Header */
  35. /* Includes ------------------------------------------------------------------*/
  36. #include "main.h"
  37. #include "stm32f4xx_it.h"
  38. #include "cmsis_os.h"
  39. /* Private includes ----------------------------------------------------------*/
  40. /* USER CODE BEGIN Includes */
  41. #include "Comunication.h"
  42. /* USER CODE END Includes */
  43. /* Private typedef -----------------------------------------------------------*/
  44. /* USER CODE BEGIN TD */
  45. /* USER CODE END TD */
  46. /* Private define ------------------------------------------------------------*/
  47. /* USER CODE BEGIN PD */
  48. /* USER CODE END PD */
  49. /* Private macro -------------------------------------------------------------*/
  50. /* USER CODE BEGIN PM */
  51. /* USER CODE END PM */
  52. /* Private variables ---------------------------------------------------------*/
  53. /* USER CODE BEGIN PV */
  54. extern uint8_t t_SPIReceived[MAXRECEIVESPI];
  55. /* USER CODE END PV */
  56. /* Private function prototypes -----------------------------------------------*/
  57. /* USER CODE BEGIN PFP */
  58. /* USER CODE END PFP */
  59. /* Private user code ---------------------------------------------------------*/
  60. /* USER CODE BEGIN 0 */
  61. /* USER CODE END 0 */
  62. /* External variables --------------------------------------------------------*/
  63. extern SPI_HandleTypeDef hspi1;
  64. extern TIM_HandleTypeDef htim5;
  65. /* USER CODE BEGIN EV */
  66. /* USER CODE END EV */
  67. /******************************************************************************/
  68. /* Cortex-M4 Processor Interruption and Exception Handlers */
  69. /******************************************************************************/
  70. /**
  71. * @brief This function handles Non maskable interrupt.
  72. */
  73. void NMI_Handler(void)
  74. {
  75. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  76. /* USER CODE END NonMaskableInt_IRQn 0 */
  77. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  78. /* USER CODE END NonMaskableInt_IRQn 1 */
  79. }
  80. /**
  81. * @brief This function handles Hard fault interrupt.
  82. */
  83. void HardFault_Handler(void)
  84. {
  85. /* USER CODE BEGIN HardFault_IRQn 0 */
  86. /* USER CODE END HardFault_IRQn 0 */
  87. while (1)
  88. {
  89. /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  90. /* USER CODE END W1_HardFault_IRQn 0 */
  91. }
  92. }
  93. /**
  94. * @brief This function handles Memory management fault.
  95. */
  96. void MemManage_Handler(void)
  97. {
  98. /* USER CODE BEGIN MemoryManagement_IRQn 0 */
  99. /* USER CODE END MemoryManagement_IRQn 0 */
  100. while (1)
  101. {
  102. /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
  103. /* USER CODE END W1_MemoryManagement_IRQn 0 */
  104. }
  105. }
  106. /**
  107. * @brief This function handles Pre-fetch fault, memory access fault.
  108. */
  109. void BusFault_Handler(void)
  110. {
  111. /* USER CODE BEGIN BusFault_IRQn 0 */
  112. /* USER CODE END BusFault_IRQn 0 */
  113. while (1)
  114. {
  115. /* USER CODE BEGIN W1_BusFault_IRQn 0 */
  116. /* USER CODE END W1_BusFault_IRQn 0 */
  117. }
  118. }
  119. /**
  120. * @brief This function handles Undefined instruction or illegal state.
  121. */
  122. void UsageFault_Handler(void)
  123. {
  124. /* USER CODE BEGIN UsageFault_IRQn 0 */
  125. /* USER CODE END UsageFault_IRQn 0 */
  126. while (1)
  127. {
  128. /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
  129. /* USER CODE END W1_UsageFault_IRQn 0 */
  130. }
  131. }
  132. /**
  133. * @brief This function handles Debug monitor.
  134. */
  135. void DebugMon_Handler(void)
  136. {
  137. /* USER CODE BEGIN DebugMonitor_IRQn 0 */
  138. /* USER CODE END DebugMonitor_IRQn 0 */
  139. /* USER CODE BEGIN DebugMonitor_IRQn 1 */
  140. /* USER CODE END DebugMonitor_IRQn 1 */
  141. }
  142. /******************************************************************************/
  143. /* STM32F4xx Peripheral Interrupt Handlers */
  144. /* Add here the Interrupt Handlers for the used peripherals. */
  145. /* For the available peripheral interrupt handler names, */
  146. /* please refer to the startup file (startup_stm32f4xx.s). */
  147. /******************************************************************************/
  148. /**
  149. * @brief This function handles SPI1 global interrupt.
  150. */
  151. void SPI1_IRQHandler(void)
  152. {
  153. /* USER CODE BEGIN SPI1_IRQn 0 */
  154. int i = 1;
  155. while(HAL_GPIO_ReadPin(MYPIN_GPIO_Port,MYPIN_Pin)==0){//a chaque intérruption du spi on vient ici
  156. HAL_SPI_Receive(&hspi1,&t_SPIReceived[i],1,5);//On recoit le byte suivant
  157. i++;
  158. if (i>MAXRECEIVESPI+1){//Si on recoit plus de MAXRECEIVESPI byte n a un probleme.
  159. while(1);//todo (RAMPES LED Amélioration) error soft
  160. }
  161. }
  162. Com_dispactch(t_SPIReceived);
  163. HAL_SPI_Receive_IT(&hspi1,t_SPIReceived,1);//On relance pour la prochiane intéruption SPI
  164. /* USER CODE END SPI1_IRQn 0 */
  165. HAL_SPI_IRQHandler(&hspi1);
  166. /* USER CODE BEGIN SPI1_IRQn 1 */
  167. /* USER CODE END SPI1_IRQn 1 */
  168. }
  169. /**
  170. * @brief This function handles TIM5 global interrupt.
  171. */
  172. void TIM5_IRQHandler(void)
  173. {
  174. /* USER CODE BEGIN TIM5_IRQn 0 */
  175. /* USER CODE END TIM5_IRQn 0 */
  176. HAL_TIM_IRQHandler(&htim5);
  177. /* USER CODE BEGIN TIM5_IRQn 1 */
  178. /* USER CODE END TIM5_IRQn 1 */
  179. }
  180. /* USER CODE BEGIN 1 */
  181. /* USER CODE END 1 */
  182. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/